1. Field of the Invention
The present invention relates generally to the field of automated design techniques for electronic circuits, and more particularly to methods and systems for verifying constraints during the layout design of a printed circuit board or multichip module.
2. Description, of the Background Art
An essential part of the design process for printed circuit boards and multichip modules is the definition of electrical, geometrical, and timing constraints that control the placement of circuit components on the circuit board, and the performance characteristics of the components. Geometrical constraints specify the relative distances and positions of circuit elements with respect to one another, such as the position of ground lines with respect to power lines. Electrical constraints define the electrical properties to be maintained by the circuit elements, such as current or voltage limitations, and the like. Timing constraints define the performance requirements of the circuit, specifying the minimum or maximum times for a circuit element to propagate its input signals. Heat constraints define operating ranges or maximums for heat buildup and dissipation. The designer typically defines a variety of different constraints for the different types of circuit elements, and properties of the circuit, such as requiring a minimum spacing between all signal paths. In many cases the designer will specify a specific constraint value for a specific circuit element, overriding any generally defined constraint for the circuit element.
During the design of the circuit, and after the definition of the constraints for the circuit elements have been defined, a number of design verification processes are implemented to test the accuracy and correctness of the design. One of the design verification processes is to test whether all of the specified constraints for all the circuit elements have been satisfied in the design. It is typical that many constraints are not satisfied due to the complexity of most circuit designs, such as multichip modules, so accurate verification of the constraints is critical to ensuring that the final circuit meets its specifications.
A typical design verification program has a verification engine with integral verification procedures for testing and verifying the types of constraints used in the design environment. Because the verification procedures are part of the verification engine, the design program is typically able to verify constraints that are allowed in the design environment. Accordingly, it is very difficult for any given design program to accommodate the rapid developments in fabrication and design technologies that require numerous new types of constraints to be defined and applied, and new verification procedures developed to verify the constraints.
Some systems partially address this problem by implementing new verification procedures directly into the verification engine. However, this restricts the designer to using only those constraints that can be verified by the current version of the design verification program he is using, and waiting for a new version to be provided by the program's vendor before implementing new constraints.
In addition, in many cases the designer may desire to implement his own constraints, ones that may not be applicable to use by other users of the design environment. However, the designer is typically unable to define his own constraints as needed or to devise his own verification procedures because they are coded into the verification engine. Thus he is limited to the using the constraints provided by the design environment and cannot customize it to his needs.
It is desirable therefore, to provide a design verification system and method that allows new constraints to be added by the designer as desired, and new verification procedures can be provided to the verification engine. This would liberate the designer from being limited to the capabilities of a fixed design environment that is only able to handle a limited range of constraint types.